1. Field of the Invention
The present invention relates generally to non-volatile magnetic memory and particularly to multi-state magnetic memory.
2. Description of the Prior Art
Computers conventionally use rotating magnetic media, such as hard disk drives (HDDs), for data storage. Though widely used and commonly accepted, such media suffer from a variety of deficiencies, such as access latency, higher power dissipation, large physical size and inability to withstand any physical shock. Thus, there is a need for a new type of storage device devoid of such drawbacks.
Other dominant storage devices are dynamic random access memory (DRAM) and static RAM (SRAM) which are volatile and very costly but have fast random read/write access time. Solid state storage, such as solid-state-nonvolatile-memory (SSNVM) devices having memory structures made of NOR/NAND-based Flash memory, providing fast access time, increased input/output (IOP) speed, decreased power dissipation and physical size and increased reliability but at a higher cost which tends to be generally multiple times higher than hard disk drives (HDDs).
Although NAND-based flash memory is more costly than HDD's, it has replaced magnetic hard drives in many applications such as digital cameras, MP3-players, cell phones, and hand held multimedia devices due, at least in part, to its characteristic of being able to retain data even when power is disconnected. However, as memory dimension requirements are dictating decreased sizes, scalability is becoming an issue because the designs of NAND-based Flash memory and DRAM memory are becoming difficult to scale with smaller dimensions. For example, NAND-based flash memory has issues related to capacitive coupling, few electrons/bit, poor error-rate performance and reduced reliability due to decreased read-write endurance. Read-write endurance refers to the number of reading, writing and erase cycles before the memory starts to degrade in performance due primarily to the high voltages required in the program, erase cycles.
It is believed that NAND flash, especially multi-bit designs thereof, would be extremely difficult to scale below 45 nanometers. Likewise, DRAM has issues related to scaling of the trench capacitors leading to very complex designs which are becoming increasingly difficult to manufacture, leading to higher cost.
Currently, applications commonly employ combinations of EEPROM/NOR, NAND, HDD, and DRAM as a part of the memory in a system design. Design of different memory technology in a product adds to design complexity, time to market and increased costs. For example, in hand-held multi-media applications incorporating various memory technologies, such as NAND Flash, DRAM and EEPROM/NOR flash memory, complexity of design is increased as are manufacturing costs and time to market. Another disadvantage is the increase in size of a device that incorporates all of these types of memories therein.
There has been an extensive effort in development of alternative technologies such as Ovanic Ram (or phase-change memory), Ferromagnetic Ram (FeRAM), Magnetic Ram (MRAM), Nanochip, and others to replace memories used in current designs such as DRAM, SRAM, EEPROM/NOR flash, NAND flash and HDD in one form or another. Although these various memory/storage technologies have created many challenges, there have been advances made in this field in recent years. MRAM seems to lead the way in terms of its progress in the past few years to replace all types of memories in the system as a universal memory solution.
One of the problems with prior art memory structures is that the current and power requirements are too high to make a functional memory device or cell. This also poses a key concern regarding the reliability of such devices due to likely dielectric break-down of the tunneling barrier layer and thereby making it non-functional.
The challenge with other prior art techniques has been that the switching current is too high to allow the making of a functional device for memory applications due to the memory's high power consumption. Several recent publications, such as those cited below as references 5 and 6(5,6) have shown that the switching current can be reduced by having the memory element pinned by two anti-ferromagnetic (AF)-couple layers resulting in spin oscillations or “pumping” and thereby reducing the switching current.
An additionally known problem is using magnetic memory to store more than two states therein. To this end, multi-level or multi-state magnetic memory cells or elements for storing more than one bit of information do not exist.
What is needed is magnetic memory for storing more than one bit of digital information.